Resistive-switching memory (RRAM) is receiving a growing deal of research interest as a possible solution for high-density, 3D nonvolatile memory technology. One of the main obstacle toward size reduction of the memory cell and its scaling is the typically large current Ireset needed for the reset operation. In fact, a large Ireset negatively impacts the scaling possibilities of the select diode in a cross-bar array structure. Reducing Ireset is therefore mandatory for the development of high-density RRAM arrays. This work addresses the reduction of Ireset in NiO-based RRAM by control of the filament size in 1 transistor–1 resistor (1T1R) cell devices. Ireset is demonstrated to be scalable and controllable below 10 μA. The significance of these results for the future scaling of diode-selected cross-bar arrays is finally discussed.
1 Apr 2011
Volume: 58 Issue: 1 Pages: 42-47